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Is the "throughput" listed by Intel per thread or per core?
user_1937197
0
•
asked Sep 27, 2021
2
1
101
intrinsics
simd
sse
x86
assembly
Why does L2 hardware prefetcher perform worse with only 1 KiB or 2 KiB access size?
user_11338006
0
•
asked Sep 27, 2021
2
1
190
prefetch
intel
x86
cpu-architecture
performance
Why does my OS won't boot but writes a space before the cursor in QEMU? (long question)
user_15893499
0
•
asked Sep 22, 2021
3
0
53
bootloader
operating-system
x86
assembly
c
Assembly skips first symbol while printing a message
user_14467358
0
•
asked Sep 19, 2021
2
1
66
output
x86
assembly
input
Why are more x86 instructions faster than less?
user_16946622
0
•
asked Sep 18, 2021
3
1
297
x86
assembly
optimization
c
x86 long mode specific instructions available on protected mode?
user_5672025
0
•
asked Sep 15, 2021
2
1
120
protected-mode
disassembly
x86
assembly
Is there a clean way to detect at runtime if code is executing inside an SGX enclave?
user_16679685
0
•
asked Sep 9, 2021
4
1
133
sgx
x86
Reason for the name of the "store buffer" litmus test on x86 TSO memory model
user_4485168
0
•
asked Sep 9, 2021
4
1
297
memory-barriers
memory-model
x86
cpu-architecture
Does _mm_stream_load_si128 (movntdqa) modify the memory its argument points to?
user_1937197
0
•
asked Sep 8, 2021
4
1
172
intrinsics
sse
x86
assembly
c
Why does clang emit a 32-bit float ps instruction for the absolute value of a 64-bit double?
user_297776
0
•
asked Sep 7, 2021
4
1
199
llvm-codegen
avx
clang
x86
assembly
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