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Hex machine code for mov immediate to 64-bit register doesn't have a REX.W prefix?
user_17523737
0
•
asked May 22, 2022
2
1
108
instruction-encoding
nasm
x86-64
machine-code
assembly
Add-Instruction is faster than the processor itself
user_13912132
0
•
asked May 22, 2022
2
0
84
microbenchmark
x86-64
assembly
cpu-architecture
c
Why does clang make the Quake fast inverse square root code 10x faster than with GCC? (with *(long*)float type punning)
user_8127588
0
•
asked May 21, 2022
4
1
253
x86-64
clang
assembly
gcc
c++
Does a multiplication of (-1) * (-1) with `imulq` sets the `OF` flag?
user_13448344
0
•
asked May 21, 2022
2
0
51
multiplication
x86-64
assembly
Why does this code execute more slowly after strength-reducing multiplications to loop-carried additions?
user_382050
0
•
asked May 19, 2022
318
7
84930
x86-64
simd
assembly
cpu-architecture
optimization
Performantly reverse the order of 16-bit quantities within a 64-bit word
user_5928341
0
•
asked May 15, 2022
3
1
77
swar
x86-64
assembly
optimization
performance
Returning two AVX/AVX2 __m256d types in C++ function calls via registers
user_18238734
0
•
asked May 14, 2022
7
0
68
avx
x86-64
calling-convention
assembly
c++
"There is no need to deallocate the stack at the end of the function when the inner-stack frame isn't modified", but it is being modified in this case
user_17934059
0
•
asked May 13, 2022
3
1
45
red-zone
stack-frame
x86-64
stack-memory
assembly
Why do x86 mul and div instructions only take a source operand?
user_12574341
0
•
asked May 7, 2022
2
1
199
instructions
x86-64
instruction-set
x86
assembly
How Do I Convert This ATT assembly to Intel Syntax? Jump to a non-relative address without using registers
user_5496340
0
•
asked May 6, 2022
3
2
170
att
x86-64
intel-syntax
assembly
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