memory-model

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Request for review of memory orders of mpsc queue
user_14870690
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2
1
128
stdatomic memory-barriers memory-model thread-safety c++
Intel-x86:The interaction between WC, WB and UC Memory
user_4023180
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2
2
506
memory-model x86 memory
Do atomic operations in Go make sure other variables are visible to other threads?
user_54748140
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4
2
1090
memory-barriers go memory-model
Triggering a bug under relaxed memory model (especially partial store ordering)
user_57902510
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2
0
103
arm64 memory-model arm android c
WeakReference, reachabilityFence, and Java Memory Model
user_68083000
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2
1
405
java-memory-model memory-model java
Why is atomic.StoreUint32 preferred over a normal assignment in sync.Once?
user_109490710
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8
3
526
go memory-model atomic concurrency
How do I synchronize a store before a load in multiple threads?
user_26537910
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3
1
212
stdatomic memory-model c++
What does memory_order_consume really do?
user_101666630
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7
3
1130
stdatomic memory-model lock-free cpu-architecture c++
Is the transformation of fetch_add(0, memory_order_relaxed/release) to mfence + mov legal?
user_132919180
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10
1
463
stdatomic memory-model x86-64 llvm c++
Is there a happens before relationship between the use of a stack local object and the destruction of the object?
user_144472960
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2
1
151
stdatomic memory-model c++11 multithreading c++
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