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Why does 8-bit MUL combine into AX but 16 and 32-bit MUL leave their result split between [E]DX:[E]AX?
Admin
1
•
asked Feb 9, 2021
4
1
403
x86-16
multiplication
instructions
x86-64
assembly
Microchip C inline asm does not generate prefix for immediates in inline asm
user_4884242
0
•
asked Feb 8, 2021
3
0
178
dspic
microchip
inline-assembly
assembly
c
understanding aarch64 assembly function call, how stack is operated?
user_1511337
0
•
asked Feb 8, 2021
2
1
1465
arm64
abi
callstack
assembly
Confused by [ebp-0xc] instead of [ebp-4] in Art of Exploitation example
user_12756579
0
•
asked Feb 7, 2021
5
1
648
x86
assembly
gcc
Is it possible to access more than 4GB of RAM in unreal mode?
user_10505778
0
•
asked Feb 5, 2021
4
0
175
memory-segmentation
osdev
x86-64
x86
assembly
Is "jr $ra" required to end a MIPS assembly language program? (MARS & QtSpim behave differently!)
user_14746133
0
•
asked Feb 5, 2021
3
2
1246
mars-simulator
qtspim
mips
assembly
Avoiding self-modifying code (SMC) machine clears when writing to executable memory
user_8528014
0
•
asked Feb 5, 2021
2
0
146
self-modifying
jit
micro-optimization
x86
assembly
How is a tword ten bytes instead of 20?
user_13188071
0
•
asked Feb 5, 2021
2
1
137
nasm
assembly
How does a 64-bit computer change one byte in memory?
user_5609685
0
•
asked Feb 4, 2021
2
2
187
x86-64
assembly
memory
cpu-architecture
c
radare2: qualified vs. unqualified flags?
user_147356
0
•
asked Feb 4, 2021
2
0
37
radare2
disassembly
debug-symbols
assembly
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