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Converting C array accesses to MIPS
user_15264554
0
•
asked Jun 11, 2021
2
1
142
mips
assembly
arrays
Is GCC inline asm goto supported in the m68k-elf target?
user_3353108
0
•
asked Jun 10, 2021
2
1
222
68000
inline-assembly
assembly
gcc
c
How to load 32 bit constant to a register without using LUI
user_16178618
0
•
asked Jun 9, 2021
2
1
539
mips
assembly
Why in xv6 there's sizeof(gdt)-1 in gdtdesc
user_8702537
0
•
asked Jun 9, 2021
2
1
207
xv6
gdt
operating-system
x86
assembly
How does LLVM avoid generating redundant native code for the `br` IR instruction?
user_818321
0
•
asked Jun 9, 2021
3
2
333
compiler-optimization
llvm-ir
llvm
assembly
compiler-construction
Why does my empty loop run twice as fast if called as a function, on Intel Skylake CPUs?
user_5220832
0
•
asked Jun 7, 2021
8
1
223
x86-64
assembly
cpu-architecture
c
performance
Different ways of how can assembly store parameters?
Admin
1
•
asked Jun 5, 2021
2
0
140
nasm
calling-convention
function-parameter
assembly
Strategy for AMD64 cache optimization - stacks, symbols, variables and strings tables
user_5603470
0
•
asked Jun 4, 2021
3
1
164
forth
x86-64
gnu-assembler
assembly
optimization
How to use risc-v timer for accurate timing generation
user_2109452
0
•
asked Jun 3, 2021
2
1
848
riscv
assembly
timer
Unable to compile assembly code with xmmword operand-size using nasm
user_6303809
0
•
asked Jun 3, 2021
2
1
289
128-bit
nasm
sse
assembly
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