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Using 16-bit addresses like foo[si] with Irvine32 (in 32-bit mode)?
user_16727443
0
•
asked Nov 29, 2021
2
1
62
irvine32
masm
memory-address
x86
assembly
Rust assembly: how do I indicate that I need the value of the SP?
user_3508956
0
•
asked Nov 28, 2021
2
2
346
stack-pointer
rust
arm
inline-assembly
assembly
Do 32-bit and 64-bit registers cause differences in CPU micro architecture?
user_17187836
0
•
asked Nov 27, 2021
4
1
250
x86-64
micro-optimization
intel
assembly
cpu-architecture
Why don't modern compilers coalesce neighboring memory accesses?
Admin
1
•
asked Nov 25, 2021
65
3
4109
compiler-optimization
assembly
optimization
c++
How to extract bitfield of loop-invariant size with varying start?
user_17502886
0
•
asked Nov 25, 2021
3
0
189
bmi
x86-64
micro-optimization
assembly
performance
Can't exactly understand the assembly code about how relocation works in u-boot
user_1511337
0
•
asked Nov 24, 2021
2
2
136
u-boot
arm64
embedded-linux
assembly
linker
How to 'tag' a location in a C source file for a later breakpoint definition?
user_3609976
0
•
asked Nov 24, 2021
6
4
133
assembly
gdb
gcc
breakpoints
c
How to tell gcc to keep my unused labels?
user_3609976
0
•
asked Nov 23, 2021
11
2
392
compiler-flags
assembly
gcc
c
VESA mode, OSDEV
user_13815846
0
•
asked Nov 23, 2021
2
1
146
vesa
x86-16
osdev
assembly
c
Why does this PowerPC instruction sequence appear to be setting both cr0 and cr1?
user_2912684
0
•
asked Nov 22, 2021
3
1
56
powerpc
assembly
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