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GCC v10.3 use more stack size than GCC v6.3 for a function
user_1799792
0
•
asked Dec 15, 2021
2
0
116
arm-none-eabi-gcc
arm
assembly
gcc
c
Why left shift instruction has two names (SAL and SHL) in x86-64 ISA?
user_17465876
0
•
asked Dec 14, 2021
4
2
275
mnemonics
instructions
x86-64
instruction-set
assembly
generating random numbers and writing them to a file in assembler (WriteFile, ReadFile)
user_16736654
0
•
asked Dec 14, 2021
1
1
78
x86
assembly
winapi
windows
Colored string is printing in reverse order not forward
user_17669148
0
•
asked Dec 13, 2021
1
1
35
bios
x86
assembly
string
GEMM kernel implemented using AVX2 is faster than AVX2/FMA on a Zen 2 CPU
user_13981672
0
•
asked Dec 13, 2021
6
1
266
avx
matrix-multiplication
micro-optimization
simd
assembly
sequence of SSE instructions for a conditional expression
user_17665807
0
•
asked Dec 13, 2021
2
1
106
x86-64
sse
assembly
c
aarch64 xtn2 clearing lower half
user_8582383
0
•
asked Dec 12, 2021
3
1
95
armv8
arm64
neon
simd
assembly
Why function that refers to a global function in the same section can only be solved at link time while local functions will be solve at compile time?
user_16651746
0
•
asked Dec 12, 2021
2
1
132
i386
relocation
elf
assembly
linker
Assembly why is "lea eax, [eax + eax*const]; shl eax, eax, const;" combined faster than "imul eax, eax, const" according to gcc -O2?
user_12892937
0
•
asked Dec 11, 2021
6
2
392
x86-64
assembly
cpu-architecture
optimization
c
How to reserve bytes in code segment in 8086
user_17638002
0
•
asked Dec 10, 2021
2
1
99
nasm
assembly
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