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Why IDA 64 breaks the ASM view after patching a value
user_1861035
0
•
asked Feb 4, 2022
1
0
28
ida
assembly
Intel-x86, confused about the allocation of bytes in the esp register
user_13175761
0
•
asked Feb 3, 2022
1
1
61
x86
assembly
c
Overriding weak C function alias with ASM function
user_7389168
0
•
asked Feb 3, 2022
2
1
141
arm
assembly
gcc
c
Why does assembly behave different on different command lines?
user_18090949
0
•
asked Feb 1, 2022
2
0
41
cmder
x86-64
assembly
command-line
Breaking long macro argument list in GNU assembler for AArch64
user_523079
0
•
asked Jan 31, 2022
2
1
113
arm64
gnu-assembler
assembly
macros
Did the low register and high register swap places?
user_12713310
0
•
asked Jan 30, 2022
1
1
50
cpu-registers
x86
assembly
arrays
loops
Subtract a variable from a register? error A2022: instruction operands must be the same size
user_16615449
0
•
asked Jan 30, 2022
2
1
124
masm
x86
assembly
What are these "abundant" assembly codes used for and why are they compiled out?
user_18055095
0
•
asked Jan 28, 2022
1
1
93
compiler-optimization
disassembly
compilation
assembly
c++
handling events for buttons in a graphical calculator in assembler
user_16736654
0
•
asked Jan 27, 2022
3
1
179
masm
x86
assembly
event-handling
winapi
What is the correct intrinsic sequence to do PSRLDQ to an XMM register while keeping the YMM part unchanged?
user_17665807
0
•
asked Jan 23, 2022
2
2
190
avx
intrinsics
x86
assembly
c
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