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Why does the latency of the sqrtsd instruction change based on the input? Intel processors
user_5927333
0
•
asked Mar 12, 2020
10
1
1063
intel
assembly
cpu-architecture
c
performance
Can a “PUSH” instruction's operation be performed using other instructions?
user_10577103
0
•
asked Mar 12, 2020
4
1
571
nasm
stack-memory
instruction-set
x86
assembly
External C code not executing from two stage x86 bootloader?
user_5816881
0
•
asked Mar 11, 2020
3
1
154
bootloader
x86
assembly
linker
c
Working of the IRQs and the iret instruction semantics on a 32 bit kernel (protected mode)
user_12419816
0
•
asked Mar 10, 2020
3
1
142
osdev
interrupt
x86
assembly
c
GCC arm instruction mode when compiling in thumb mode
user_5079958
0
•
asked Mar 10, 2020
6
2
1683
arm
assembly
gcc
c
Where does an “ADD” instruction store the result?
user_12479273
0
•
asked Mar 10, 2020
2
0
40
att
x86
assembly
gcc
The int 10h , ah as 0d in assembly always returns 0 as the color of the pixel under the mouse pointer
user_13032613
0
•
asked Mar 9, 2020
2
2
180
bios
x86-16
mouse
assembly
UEFI boot services CreateEvent() returning status EFI_INVALID_PARAMETER
user_13025365
0
•
asked Mar 7, 2020
5
1
317
uefi
nasm
x86-64
x86
assembly
Why return object address in %rax when returning a MEMORY type?
user_5225378
0
•
asked Mar 7, 2020
3
1
145
x86-64
calling-convention
assembly
linux
Why does the Linux Kernel copy implementation use the AC flag?
user_8990329
0
•
asked Mar 7, 2020
4
1
227
x86
assembly
linux-kernel
systems-programming
linux
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