assembly

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optimizing percpu 2 level bit vector in restartable sequence on x86-64, skylake
user_113221310
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127
x86-64 micro-optimization assembly linux-kernel c
Why does gcc use btq in conjunction with btcq when conditionally set a bit in a uint64_t * memory region
user_113221310
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5
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145
x86-64 micro-optimization assembly gcc c
Can't modify assembly in x64dbg
user_90462670
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2
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4324
x64dbg x86-64 disassembly assembly debugging
Why does division by 3 require a rightshift (and other oddities) on x86?
user_57404280
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34
4
2230
integer-division x86-64 compilation assembly c++
Align in assembly x86
user_104685050
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4
1
224
nasm memory-alignment x86 assembly
How can memory destination BTS be significantly slower than load / BTS reg,reg / store?
user_113221310
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5
1
175
microcoding x86-64 assembly cpu-architecture performance
What is "int 80h" in Linux?
user_138590830
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4
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5736
system-calls x86 assembly linux-kernel linux
The x86 disassembly for C code generates: orq $0x0, %(rsp)
user_89819680
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2
3
816
x86-64 callstack assembly gcc c
LinuxPerfAsmProfiler shows Java code corresponding assembly hot spot for Java 8, but not for Java 14
user_124738430
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5
1
184
jvm assembly profiling java performance
Is it legal to have same register as operands in one instruction?
Admin1
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2
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382
instructions x86-64 instruction-set assembly
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